`timescale 1ns/100ps
module displayTop_tb;
reg         alarm       ;
reg  [7:0]  t_hour      ;
reg  [7:0]  t_min       ;
reg  [7:0]  t_sec       ;
reg         t_AM_PM     ;

reg  [7:0]  a_hour      ;
reg  [7:0]  a_min       ;
reg  [7:0]  a_sec       ;
reg         a_AM_PM     ;

wire        o_AM_PM     ;
wire [6:0]  digHourUpper;
wire [6:0]  digHourLow  ;
wire [6:0]  digMinUpper ;
wire [6:0]  digMinLow   ;
wire [6:0]  digSecUpper ;
wire [6:0]  digSecLow   ;

initial begin
    alarm   =   1'b0;
    {t_hour, t_min, t_sec} = 24'h123456;
    t_AM_PM = 1'b1;
    {a_hour, a_min, a_sec} = 24'h078900;        // not true time, just for test the decoder
    a_AM_PM = 1'b0;
    #5
    alarm   =   1'b1;
    #5
    $stop;
end

displayTop displayTop_inst(
    .alarm          (       alarm           ),
    .t_hour         (       t_hour          ),
    .t_min          (       t_min           ),
    .t_sec          (       t_sec           ),
    .t_AM_PM        (       t_AM_PM         ),

    .a_hour         (       a_hour          ),
    .a_min          (       a_min           ),
    .a_sec          (       a_sec           ),
    .a_AM_PM        (       a_AM_PM         ),

    .o_AM_PM        (       o_AM_PM         ),
    .digHourUpper   (       digHourUpper    ),
    .digHourLow     (       digHourLow      ),
    .digMinUpper    (       digMinUpper     ),
    .digMinLow      (       digMinLow       ),
    .digSecUpper    (       digSecUpper     ),
    .digSecLow      (       digSecLow       )
);

    
endmodule